#!/usr/bin/python3 # -*- coding: utf-8 -*- # (c) B.Kerler 2018-2025 GPLv3 License # DXCC = Discretix CryptoCell import logging import hashlib from struct import pack from Cryptodome.Util.number import bytes_to_long from Cryptodome.Cipher import AES from Cryptodome.Util import Counter from mtkclient.Library.gui_utils import LogBase, logsetup Lcs = 0xA KceSet = 0xB Kce = 0xC # CodeEncryptionKey SASI_SB_HASH_BOOT_KEY_256B = 2 # 0x10 SASI_SB_HASH_BOOT_KEY_1_128B = 1 # 0x14 SASI_SW_VERSION_COUNTER1 = 1 # 0x18 SASI_SW_VERSION_COUNTER2 = 2 # 0x19 oem_pubk = "DACD8B5FDA8A766FB7BCAA43F0B16915" + \ "CE7B47714F1395FDEBCF12A2D41155B0" + \ "FB587A51FECCCB4DDA1C8E5EB9EB69B8" + \ "6DAF2C620F6C2735215A5F22C0B6CE37" + \ "7AA0D07EB38ED340B5629FC2890494B0" + \ "78A63D6D07FDEACDBE3E7F27FDE4B143" + \ "F49DB4971437E6D00D9E18B56F02DABE" + \ "B0000B6E79516D0C8074B5A42569FD0D" + \ "9196655D2A4030D42DFE05E9F64883E6" + \ "D5F79A5BFA3E7014C9A62853DC1F21D5" + \ "D626F4D0846DB16452187DD776E8886B" + \ "48C210C9E208059E7CAFC997FD2CA210" + \ "775C1A5D9AA261252FB975268D970C62" + \ "733871D57814098A453DF92BC6CA1902" + \ "5CD9D430F02EE46F80DE6C63EA802BEF" + \ "90673AAC4C6667F2883FB4501FA77455" huawei_med_lx9 = "C1A9D3E65C7EAEB31932E9DD224C07C0" + \ "70D879FB4FE518C64E92C24B79DC1EE1" + \ "535D91D38DD34D7E32A22DEED60F0727" + \ "FF8F8747E2598ACB5DDC73C61D2434A9" + \ "1D568FE3E773BD0D17AA46B0364E0DCF" + \ "3B41E0034605D572B6CD7DD8A816E7D6" + \ "84181B1646628576D1E22F55071687B9" + \ "E5B2F9C9536167B7EDCF10F1F85BE57B" + \ "6EE873BFE952BB33F0001140E0E46AF2" + \ "D64D39C568D8E372BCE3609BCACA5316" + \ "E4EBDDE5721B33611E064DF41A4BCF0A" + \ "3A395791D3203BF220DC71F4267093CE" + \ "B78E30A844D4631DE8CE6D0514202BB5" + \ "8AD2024B16558C2AD9B30CE05043FF67" + \ "C4D265A3D5F3275D93AFDC1A39625C2C" + \ "5BD6FDCDBD75E76E6D9E74E9672B5897" buffer = bytearray(b"\x00" * 0x20C) buffer[0:4] = pack(" 256) SEP_CTX_SIZE_LOG2 8 #else SEP_CTX_SIZE_LOG2 7 #endif #endif SEP_CTX_SIZE (1<> 2) SEP_DES_IV_SIZE 8 SEP_DES_BLOCK_SIZE 8 SEP_DES_ONE_KEY_SIZE 8 SEP_DES_DOUBLE_KEY_SIZE 16 SEP_DES_TRIPLE_KEY_SIZE 24 SEP_DES_KEY_SIZE_MAX SEP_DES_TRIPLE_KEY_SIZE SEP_AES_IV_SIZE 16 SEP_AES_IV_SIZE_WORDS (SEP_AES_IV_SIZE >> 2) SEP_AES_BLOCK_SIZE 16 SEP_AES_BLOCK_SIZE_WORDS 4 SEP_AES_128_BIT_KEY_SIZE 16 SEP_AES_128_BIT_KEY_SIZE_WORDS (SEP_AES_128_BIT_KEY_SIZE >> 2) SEP_AES_192_BIT_KEY_SIZE 24 SEP_AES_192_BIT_KEY_SIZE_WORDS (SEP_AES_192_BIT_KEY_SIZE >> 2) SEP_AES_256_BIT_KEY_SIZE 32 SEP_AES_256_BIT_KEY_SIZE_WORDS (SEP_AES_256_BIT_KEY_SIZE >> 2) SEP_AES_KEY_SIZE_MAX SEP_AES_256_BIT_KEY_SIZE SEP_AES_KEY_SIZE_WORDS_MAX (SEP_AES_KEY_SIZE_MAX >> 2) SEP_MD5_DIGEST_SIZE 16 SEP_SHA1_DIGEST_SIZE 20 SEP_SHA224_DIGEST_SIZE 28 SEP_SHA256_DIGEST_SIZE 32 SEP_SHA256_DIGEST_SIZE_IN_WORDS 8 SEP_SHA384_DIGEST_SIZE 48 SEP_SHA512_DIGEST_SIZE 64 SEP_SHA1_BLOCK_SIZE 64 SEP_SHA1_BLOCK_SIZE_IN_WORDS 16 SEP_MD5_BLOCK_SIZE 64 SEP_MD5_BLOCK_SIZE_IN_WORDS 16 SEP_SHA224_BLOCK_SIZE 64 SEP_SHA256_BLOCK_SIZE 64 SEP_SHA256_BLOCK_SIZE_IN_WORDS 16 SEP_SHA1_224_256_BLOCK_SIZE 64 SEP_SHA384_BLOCK_SIZE 128 SEP_SHA512_BLOCK_SIZE 128 #if (SEP_SUPPORT_SHA > 256) SEP_DIGEST_SIZE_MAX SEP_SHA512_DIGEST_SIZE SEP_HASH_BLOCK_SIZE_MAX SEP_SHA512_BLOCK_SIZE /*1024b*/ #else /* Only up to SHA256 */ SEP_DIGEST_SIZE_MAX SEP_SHA256_DIGEST_SIZE SEP_HASH_BLOCK_SIZE_MAX SEP_SHA256_BLOCK_SIZE /*512b*/ #endif SEP_HMAC_BLOCK_SIZE_MAX SEP_HASH_BLOCK_SIZE_MAX SEP_RC4_KEY_SIZE_MIN 1 SEP_RC4_KEY_SIZE_MAX 20 SEP_RC4_STATE_SIZE 264 SEP_C2_KEY_SIZE_MAX 16 SEP_C2_BLOCK_SIZE 8 SEP_MULTI2_SYSTEM_KEY_SIZE 32 SEP_MULTI2_DATA_KEY_SIZE 8 SEP_MULTI2_SYSTEM_N_DATA_KEY_SIZE (SEP_MULTI2_SYSTEM_KEY_SIZE + SEP_MULTI2_DATA_KEY_SIZE) #define SEP_MULTI2_BLOCK_SIZE 8 #define SEP_MULTI2_IV_SIZE 8 #define SEP_MULTI2_MIN_NUM_ROUNDS 8 #define SEP_MULTI2_MAX_NUM_ROUNDS 128 SEP_ALG_MAX_BLOCK_SIZE SEP_HASH_BLOCK_SIZE_MAX SEP_MAX_COMBINED_ENGINES 4 SEP_MAX_CTX_SIZE (max(sizeof(struct sep_ctx_rc4), sizeof(struct sep_ctx_cache_entry))) """ def hw_desc_init(): return [0, 0, 0, 0, 0, 0] def bitmask(mask_size): if mask_size < 32: return (1 << mask_size) - 1 else: return 0xFFFFFFFF def tovalue(value, bitsize, shift): v = value & (1 << bitsize) - 1 return v << shift def hw_desc_set_cipher_mode(p_desc, cipher_mode): shift, bitsize = DSCRPTR["DSCRPTR_QUEUE0_WORD4"][1]["CIPHER_MODE"] p_desc[4] |= tovalue(cipher_mode, bitsize, shift) return p_desc def hw_desc_set_cipher_config0(p_desc, cipher_config): shift, bitsize = DSCRPTR["DSCRPTR_QUEUE0_WORD4"][1]["CIPHER_CONF0"] p_desc[4] |= tovalue(cipher_config, bitsize, shift) return p_desc def hw_desc_set_cipher_config1(p_desc, cipher_config): shift, bitsize = DSCRPTR["DSCRPTR_QUEUE0_WORD4"][1]["CIPHER_CONF1"] p_desc[4] |= tovalue(cipher_config, bitsize, shift) return p_desc def hw_desc_set_setup_mode(p_desc, setup_mode): shift, bitsize = DSCRPTR["DSCRPTR_QUEUE0_WORD4"][1]["SETUP_OPERATION"] p_desc[4] |= tovalue(setup_mode, bitsize, shift) return p_desc def hw_desc_set_flow_mode(p_desc, flow_mode): shift, bitsize = DSCRPTR["DSCRPTR_QUEUE0_WORD4"][1]["DATA_FLOW_MODE"] p_desc[4] |= tovalue(flow_mode, bitsize, shift) return p_desc def hw_desc_set_dout_sram(p_desc, dout_adr, dout_size): v = DSCRPTR["DSCRPTR_QUEUE0_WORD2"] shift, bitsize = v[1], v[2] p_desc[2] |= tovalue((dout_adr & 0xFFFFFFFF), bitsize, shift) shift, bitsize = DSCRPTR["DSCRPTR_QUEUE0_WORD3"][1]["DOUT_DMA_MODE"] p_desc[3] |= tovalue(DmaMode.DMA_SRAM, bitsize, shift) shift, bitsize = DSCRPTR["DSCRPTR_QUEUE0_WORD3"][1]["DOUT_SIZE"] p_desc[3] |= tovalue(dout_size, bitsize, shift) return p_desc def hw_desc_set_dout_dlli(p_desc, dout_adr, dout_size, axi_ns, lastind): v = DSCRPTR["DSCRPTR_QUEUE0_WORD2"] shift, bitsize = v[1], v[2] p_desc[2] |= tovalue((dout_adr & 0xFFFFFFFF), bitsize, shift) shift, bitsize = DSCRPTR["DSCRPTR_QUEUE0_WORD5"][1]["DOUT_ADDR_HIGH"] p_desc[5] |= tovalue((dout_adr >> 32 & 0xFFFFFFFF) << 16, bitsize, shift) shift, bitsize = DSCRPTR["DSCRPTR_QUEUE0_WORD3"][1]["DOUT_DMA_MODE"] p_desc[3] |= tovalue(DmaMode.DMA_DLLI, bitsize, shift) shift, bitsize = DSCRPTR["DSCRPTR_QUEUE0_WORD3"][1]["DOUT_SIZE"] p_desc[3] |= tovalue(dout_size, bitsize, shift) shift, bitsize = DSCRPTR["DSCRPTR_QUEUE0_WORD3"][1]["DOUT_LAST_IND"] p_desc[3] |= tovalue(lastind, bitsize, shift) shift, bitsize = DSCRPTR["DSCRPTR_QUEUE0_WORD3"][1]["NS_BIT"] p_desc[3] |= tovalue(lastind, bitsize, shift) return p_desc def hw_desc_set_key_size_aes(p_desc, key_size): shift, bitsize = DSCRPTR["DSCRPTR_QUEUE0_WORD4"][1]["KEY_SIZE"] p_desc[4] |= tovalue(((key_size >> 3) - 2), bitsize, shift) return p_desc def hw_desc_set_din_sram(p_desc, din_adr, din_size): v = DSCRPTR["DSCRPTR_QUEUE0_WORD0"] shift, bitsize = v[1], v[2] p_desc[0] |= tovalue(din_adr & 0xFFFFFFFF, bitsize, shift) shift, bitsize = DSCRPTR["DSCRPTR_QUEUE0_WORD1"][1]["DIN_DMA_MODE"] p_desc[1] |= tovalue(DmaMode.DMA_SRAM, bitsize, shift) shift, bitsize = DSCRPTR["DSCRPTR_QUEUE0_WORD1"][1]["DIN_SIZE"] p_desc[1] |= tovalue(din_size, bitsize, shift) return p_desc def hw_desc_set_din_const(p_desc, val, din_size): v = DSCRPTR["DSCRPTR_QUEUE0_WORD0"] shift, bitsize = v[1], v[2] p_desc[0] |= tovalue(val & 0xFFFFFFFF, bitsize, shift) shift, bitsize = DSCRPTR["DSCRPTR_QUEUE0_WORD1"][1]["DIN_CONST_VALUE"] p_desc[1] |= tovalue(1, bitsize, shift) shift, bitsize = DSCRPTR["DSCRPTR_QUEUE0_WORD1"][1]["DIN_DMA_MODE"] p_desc[1] |= tovalue(DmaMode.DMA_SRAM, bitsize, shift) shift, bitsize = DSCRPTR["DSCRPTR_QUEUE0_WORD1"][1]["DIN_SIZE"] p_desc[1] |= tovalue(din_size, bitsize, shift) return p_desc def hw_desc_set_cipher_do(p_desc, cipher_do): shift, bitsize = DSCRPTR["DSCRPTR_QUEUE0_WORD4"][1]["CIPHER_DO"] p_desc[4] |= tovalue(cipher_do, bitsize, shift) return p_desc def hw_desc_set_din_nodma(p_desc, din_adr, din_size): v = DSCRPTR["DSCRPTR_QUEUE0_WORD0"] shift, bitsize = v[1], v[2] p_desc[0] |= tovalue(din_adr & 0xFFFFFFFF, bitsize, shift) shift, bitsize = DSCRPTR["DSCRPTR_QUEUE0_WORD1"][1]["DIN_DMA_MODE"] p_desc[1] |= tovalue(DmaMode.NO_DMA, bitsize, shift) shift, bitsize = DSCRPTR["DSCRPTR_QUEUE0_WORD1"][1]["DIN_SIZE"] p_desc[1] |= tovalue(din_size, bitsize, shift) return p_desc def hw_desc_set_din_type(p_desc, dma_mode, din_adr, din_size, axi_id, axi_ns): v = DSCRPTR["DSCRPTR_QUEUE0_WORD0"] shift, bitsize = v[1], v[2] p_desc[0] |= tovalue(din_adr & 0xFFFFFFFF, bitsize, shift) shift, bitsize = DSCRPTR["DSCRPTR_QUEUE0_WORD5"][1]["DIN_ADDR_HIGH"] p_desc[5] |= tovalue(din_adr >> 32 & 0xFFFF, bitsize, shift) shift, bitsize = DSCRPTR["DSCRPTR_QUEUE0_WORD1"][1]["DIN_DMA_MODE"] p_desc[1] |= tovalue(dma_mode, bitsize, shift) shift, bitsize = DSCRPTR["DSCRPTR_QUEUE0_WORD1"][1]["DIN_SIZE"] p_desc[1] |= tovalue(din_size, bitsize, shift) shift, bitsize = DSCRPTR["DSCRPTR_QUEUE0_WORD1"][1]["DIN_VIRTUAL_HOST"] p_desc[1] |= tovalue(axi_id, bitsize, shift) shift, bitsize = DSCRPTR["DSCRPTR_QUEUE0_WORD1"][1]["NS_BIT"] p_desc[1] |= tovalue(axi_ns, bitsize, shift) return p_desc class DxccReg: def __init__(self, setup): self.dxcc_base = setup.dxcc_base self.read32 = setup.read32 self.write32 = setup.write32 def __setattr__(self, key, value): if key in ("sej_base", "read32", "write32", "regval"): return super(DxccReg, self).__setattr__(key, value) if key in regval: addr = regval[key] + self.sej_base return self.write32(addr, value) else: return super(DxccReg, self).__setattr__(key, value) def __getattribute__(self, item): if item in ("sej_base", "read32", "write32", "regval"): return super(DxccReg, self).__getattribute__(item) if item in regval: addr = regval[item] + self.sej_base return self.read32(addr) else: return super(DxccReg, self).__getattribute__(item) class Dxcc(metaclass=LogBase): DX_HOST_IRR = 0xA00 DX_HOST_ICR = 0xA08 # DX_CC = (HOST_RGF, HOST_ICR) DX_DSCRPTR_QUEUE0_WORD0 = 0xE80 DX_DSCRPTR_QUEUE0_WORD1 = 0xE84 DX_DSCRPTR_QUEUE0_WORD2 = 0xE88 DX_DSCRPTR_QUEUE0_WORD3 = 0xE8C DX_DSCRPTR_QUEUE0_WORD4 = 0xE90 DX_DSCRPTR_QUEUE0_WORD5 = 0xE94 DX_DSCRPTR_QUEUE0_CONTENT = 0xE9C DX_HOST_SEP_HOST_GPR0 = 0xA80 # DX_HOST_SEP_HOST_GPR0_REG_OFFSET DX_HOST_SEP_HOST_GPR1 = 0xA88 DX_HOST_SEP_HOST_GPR2 = 0xA90 DX_HOST_SEP_HOST_GPR3 = 0xA9C DX_HOST_SEP_HOST_GPR4 = 0xAA0 def sb_hal_clear_interrupt_bit(self): self.write32(self.dxcc_base + self.DX_HOST_ICR, 4) def sb_crypto_wait(self): while True: value = self.read32(self.dxcc_base + self.DX_HOST_IRR) if value != 0: return value def sasi_paldmaunmap(self, value1): return @staticmethod def sasi_paldmamap(value1): # value2=value1 return value1 def sasi_sb_adddescsequence(self, data): while True: if self.read32(self.dxcc_base + self.DX_DSCRPTR_QUEUE0_CONTENT) << 0x1C != 0: break self.write32(self.dxcc_base + self.DX_DSCRPTR_QUEUE0_WORD0, data[0]) self.write32(self.dxcc_base + self.DX_DSCRPTR_QUEUE0_WORD1, data[1]) self.write32(self.dxcc_base + self.DX_DSCRPTR_QUEUE0_WORD2, data[2]) self.write32(self.dxcc_base + self.DX_DSCRPTR_QUEUE0_WORD3, data[3]) self.write32(self.dxcc_base + self.DX_DSCRPTR_QUEUE0_WORD4, data[4]) self.write32(self.dxcc_base + self.DX_DSCRPTR_QUEUE0_WORD5, data[5]) def __init__(self, setup, loglevel=logging.INFO, gui: bool = False): self.__logger, self.info, self.debug, self.warning, self.error = logsetup(self, self.__logger, loglevel, gui) self.hwcode = setup.hwcode self.dxcc_base = setup.dxcc_base self.read32 = setup.read32 self.write32 = setup.write32 self.writemem = setup.writemem self.da_payload_addr = setup.da_payload_addr self.reg = DxccReg(setup) def tzcc_clk(self, value): if value: if self.hwcode in [0x1209]: res = self.write32(0x10001084, 0x600) else: res = self.write32(0x1000108C, 0x18000000) else: if self.hwcode in [0x1209]: res = self.write32(0x10001080, 0x200) else: res = self.write32(0x10001088, 0x8000000) return res def generate_itrustee_fbe(self, key_sz=32, appid: bytes = b""): salt = b"TrustedCorekeymaster" + b"\x07" * 0x10 + appid return self.generate_aes_cmac(key_sz=key_sz, salt=salt) def generate_aes_cmac(self, key_sz=32, salt: bytes = b""): fdekey = b"" dstaddr = self.da_payload_addr - 0x300 if self.hwcode == 0x1129: dstaddr = 0x20F1000 self.tzcc_clk(1) for ctr in range(0, key_sz // 16): seed = salt + pack(" 0: keylength = 0x10 self.tzcc_clk(1) dstaddr = self.da_payload_addr - 0x300 if self.hwcode == 0x1129: dstaddr = 0x20F1000 rpmbkey = self.sbrom_key_derivation(1, rpmb_ikey, rpmb_salt, keylength, dstaddr) self.tzcc_clk(0) return rpmbkey def sasi_bsv_socid_compute(self): key = bytes.fromhex("49") salt = b"\x00" * 32 keylength = 0x10 self.tzcc_clk(1) dstaddr = self.da_payload_addr - 0x300 if self.hwcode == 0x1129: dstaddr = 0x20F1000 pubkey = self.sasi_bsv_pub_key_hash_get(SASI_SB_HASH_BOOT_KEY_256B) derivedkey = self.sbrom_key_derivation(1, key, salt, keylength, dstaddr) hash = hashlib.sha256(pubkey + derivedkey).digest() self.tzcc_clk(0) return hash def generate_rpmb_mitee(self): rpmb_ikey = bytes.fromhex("AD1AC6B4BDF4EDB7") rpmb_salt = bytes.fromhex("69EF6584") keylength = 0x10 self.tzcc_clk(1) dstaddr = self.da_payload_addr - 0x300 if self.hwcode == 0x1129: dstaddr = 0x20F1000 rpmbkey = self.sbrom_key_derivation(1, rpmb_ikey, rpmb_salt, keylength, dstaddr) self.tzcc_clk(0) return rpmbkey def sasi_bsv_otp_word_read(self, otpAddress): if otpAddress > 0x24: return None while True: val = self.read32(self.dxcc_base + (0x2AF * 4)) & 1 if val != 0: break self.write32(self.dxcc_base + (0x2A9 * 4), (4 * otpAddress) | 0x10000) while True: val = self.read32(self.dxcc_base + (0x2AD * 4)) & 1 if val != 0: break res = self.read32(self.dxcc_base + (0x2AB * 4)) return res def sasi_bsv_lcs_get(self): while True: val = self.read32(self.dxcc_base + (0x2AF * 4)) & 1 if val != 0: break lcs = self.read32(self.dxcc_base + (0x2B5 * 4)) if lcs != 1: if lcs != 5: return 0 if self.read32(self.dxcc_base + (0x2B5 * 4)) & 0x100 != 0: return 0xB000002 otp_word = self.sasi_bsv_otp_word_read(0xA) if self.read32(self.dxcc_base + (0x2B5 * 4)) & 0x100 != 0: if otp_word & 0xF0000 != 0x30000: return 0xB000080 if self.read32(self.dxcc_base + (0x2B5 * 4)) & 0x200 == 0: return 0 return 0xB000003 def sasi_bsv_pub_key_hash_get(self, keyindex=SASI_SB_HASH_BOOT_KEY_256B): if keyindex == SASI_SB_HASH_BOOT_KEY_256B: start = 0x10 length = 0x8 elif keyindex == SASI_SB_HASH_BOOT_KEY_1_128B: start = 0x14 length = 0x4 else: return None hashval = bytearray() for idx in range(start, start + length, 0x1): hashval.extend(int.to_bytes(self.sasi_bsv_otp_word_read(idx), 4, 'little')) return hashval def sbrom_decrypt_kcst(self): pdesc = hw_desc_init() pdesc[0] = 0 pdesc[1] = 0x3FFC000 pdesc[2] = 0 pdesc[3] = 0 pdesc[4] = 0 pdesc[5] = 0 self.sasi_sb_adddescsequence(pdesc) self.sb_hal_wait_desc_completion() def sbrom_aeslockenginekey(self): pdesc = hw_desc_init() pdesc[0] = 0 pdesc[1] = 0x8000081 pdesc[2] = 0 pdesc[3] = 0 pdesc[4] = 0x4801C20 pdesc[5] = 0 self.sasi_sb_adddescsequence(pdesc) self.sb_hal_wait_desc_completion() def sasi_bsv_customer_key_decrypt(self): plat_key = b"KEY PLAT" dstaddr = self.da_payload_addr - 0x300 if self.hwcode == 0x1129: dstaddr = 0x20F1000 salt = self.sasi_bsv_pub_key_hash_get(keyindex=SASI_SB_HASH_BOOT_KEY_256B) platkey = self.sbrom_key_derivation(HwCryptoKey.PLATFORM_KEY, plat_key, salt, 0x10, dstaddr) _ = platkey while True: val = self.read32(self.dxcc_base + 0xAF4) & 1 if val != 0: break self.sbrom_decrypt_kcst() while True: val = self.read32(self.dxcc_base + 0xAF0) & 1 if val != 0: break self.write32(self.dxcc_base + 0xAC0, 0) self.write32(self.dxcc_base + 0xAC4, 0) self.write32(self.dxcc_base + 0xAC8, 0) self.write32(self.dxcc_base + 0xACC, 0) self.sbrom_aeslockenginekey() def sasi_bsv_security_disable(self): lcs = self.sasi_bsv_lcs_get() if lcs == 7: return self.write32(self.dxcc_base + 0xAC0, 0) self.write32(self.dxcc_base + 0xAC4, 0) self.write32(self.dxcc_base + 0xAC8, 0) self.write32(self.dxcc_base + 0xACC, 0) self.write32(self.dxcc_base + 0xAD8, 1) def generate_provision_key(self): plat_key = b"KEY PLAT" prov_key = b"PROVISION KEY" self.tzcc_clk(1) dstaddr = self.da_payload_addr - 0x300 if self.hwcode == 0x1129: dstaddr = 0x20F1000 lcs = self.sasi_bsv_lcs_get() _ = lcs # salt = hashlib.sha256(bytes.fromhex(oem_pubk)).digest() salt = self.sasi_bsv_pub_key_hash_get(keyindex=SASI_SB_HASH_BOOT_KEY_256B) platkey = self.sbrom_key_derivation(HwCryptoKey.PLATFORM_KEY, plat_key, salt, 0x10, dstaddr) while True: val = self.read32(self.dxcc_base + 0xAF4) & 1 if val != 0: break provkey = self.sbrom_key_derivation(HwCryptoKey.PROVISIONING_KEY, prov_key, salt, 0x10, dstaddr) self.write32(self.dxcc_base + 0xAC0, 0) self.write32(self.dxcc_base + 0xAC4, 0) self.write32(self.dxcc_base + 0xAC8, 0) self.write32(self.dxcc_base + 0xACC, 0) pdesc = hw_desc_init() pdesc[0] = 0 pdesc[1] = 0x8000081 pdesc[2] = 0 pdesc[3] = 0 pdesc[4] = 0x4801C20 pdesc[5] = 0 self.sasi_sb_adddescsequence(pdesc) dstaddr = self.da_payload_addr - 0x300 if self.hwcode == 0x1129: dstaddr = 0x20F1000 self.sb_hal_wait_desc_completion() # data=self.read32(0x200D90) self.tzcc_clk(0) return platkey, provkey def generate_sha256(self, data): dstaddr = self.da_payload_addr - 0x300 if self.hwcode == 0x1129: dstaddr = 0x20F1000 self.sbrom_sha256(_buffer=data, destaddr=dstaddr) result = bytearray() for field in self.read32(dstaddr, 8): result.extend(pack(" HwCryptoKey.PLATFORM_KEY or (1 << (aeskeytype - 1) & 0x17) == 0: return 0xF2000002 if requestedlen > 0xFF or (requestedlen << 28) & 0xFFFFFFFF: return 0xF2000003 if 0x0 >= len(label) > 0x20: return 0xF2000003 bufferlen = len(salt) + 3 + len(label) iterlength = (requestedlen + 0xF) >> 4 for i in range(0, iterlength): _buffer = pack("> 32) << 16) # 5 self.sasi_sb_adddescsequence(data) while True: if self.sb_crypto_wait() & 4 != 0: break while True: value = self.read32(self.dxcc_base + 0xBA0) if value != 0: break if value == 1: self.sb_hal_clear_interrupt_bit() self.sasi_paldmaunmap(val) return 0 else: return 0xF6000001 def sbrom_aes_cmac_driver(self, aes_key_type, p_internal_key, p_data_in, dma_mode, block_size, p_data_out): iv_sram_addr = 0 if aes_key_type == HwCryptoKey.ROOT_KEY: if (self.read32(self.dxcc_base + self.DX_HOST_SEP_HOST_GPR4) >> 1) & 1 == 1: key_size_in_bytes = 0x20 # SEP_AES_256_BIT_KEY_SIZE else: key_size_in_bytes = 0x10 # SEP_AES_128_BIT_KEY_SIZE else: key_size_in_bytes = 0x10 # SEP_AES_128_BIT_KEY_SIZE self.sb_hal_init() pdesc = hw_desc_init() pdesc = hw_desc_set_cipher_mode(pdesc, SepCipherMode.SEP_CIPHER_CMAC) # desc[4]=0x1C00 pdesc = hw_desc_set_cipher_config0(pdesc, DescDirection.DESC_DIRECTION_ENCRYPT_ENCRYPT) pdesc = hw_desc_set_key_size_aes(pdesc, key_size_in_bytes) # desc[4]=0x801C00 pdesc = hw_desc_set_din_sram(pdesc, iv_sram_addr, AES_IV_COUNTER_SIZE_IN_BYTES) pdesc = hw_desc_set_din_const(pdesc, 0, AES_IV_COUNTER_SIZE_IN_BYTES) # desc[1]=0x8000041 pdesc = hw_desc_set_flow_mode(pdesc, FlowMode.S_DIN_to_AES) # desc[4]=0x801C20 pdesc = hw_desc_set_setup_mode(pdesc, SetupOp.SETUP_LOAD_STATE0) # desc[4]=0x1801C20 # pdesc[1] |= 0x8000000 # self.sasi_sb_adddescsequence(pdesc) # Load key mdesc = hw_desc_init() if aes_key_type == HwCryptoKey.USER_KEY: key_sram_addr = p_internal_key mdesc = hw_desc_set_din_sram(mdesc, key_sram_addr, AES_Key128Bits_SIZE_IN_BYTES) mdesc = hw_desc_set_cipher_do(mdesc, aes_key_type) # desc[4]=0x8000 mdesc = hw_desc_set_cipher_mode(mdesc, SepCipherMode.SEP_CIPHER_CMAC) # desc[4]=0x9C00 mdesc = hw_desc_set_cipher_config0(mdesc, DescDirection.DESC_DIRECTION_ENCRYPT_ENCRYPT) mdesc = hw_desc_set_key_size_aes(mdesc, key_size_in_bytes) # desc[4]=0x809C00 mdesc = hw_desc_set_flow_mode(mdesc, FlowMode.S_DIN_to_AES) # desc[4]=0x809C20 mdesc = hw_desc_set_setup_mode(mdesc, SetupOp.SETUP_LOAD_KEY0) # desc[4]=0x4809C20 mdesc[4] |= ((aes_key_type >> 2) & 3) << 20 self.sasi_sb_adddescsequence(mdesc) # Process input data rdesc = hw_desc_init() if dma_mode == DmaMode.DMA_SRAM: rdesc = hw_desc_set_din_sram(rdesc, p_data_in, block_size) else: rdesc = hw_desc_set_din_type(rdesc, DmaMode.DMA_DLLI, p_data_in, block_size, SB_AXI_ID, AXI_SECURE) # desc[1]=0x3E, desc[0]=0x200E18 rdesc = hw_desc_set_flow_mode(rdesc, FlowMode.DIN_AES_DOUT) # desc[4]=1 self.sasi_sb_adddescsequence(rdesc) if aes_key_type != HwCryptoKey.PROVISIONING_KEY: xdesc = hw_desc_init() xdesc = hw_desc_set_cipher_mode(xdesc, SepCipherMode.SEP_CIPHER_CMAC) # desc[4]=0x1C00 xdesc = hw_desc_set_cipher_config0(xdesc, DescDirection.DESC_DIRECTION_ENCRYPT_ENCRYPT) xdesc = hw_desc_set_setup_mode(xdesc, SetupOp.SETUP_WRITE_STATE0) # desc[4]=0x8001C00 xdesc = hw_desc_set_flow_mode(xdesc, FlowMode.S_AES_to_DOUT) # desc[4]=0x8001C26 if dma_mode == DmaMode.DMA_SRAM: xdesc = hw_desc_set_dout_sram(xdesc, p_data_out, AES_BLOCK_SIZE_IN_BYTES) else: xdesc = hw_desc_set_dout_dlli(xdesc, p_data_out, AES_BLOCK_SIZE_IN_BYTES, SB_AXI_ID, 0) # desc[2]=0x200E08, desc[3]=0x42 # xdesc = hw_desc_set_din_sram(xdesc, 0, 0) xdesc = hw_desc_set_din_nodma(xdesc, 0, 0) self.sasi_sb_adddescsequence(xdesc) return self.sb_hal_wait_desc_completion() == 0 @staticmethod def mtee_decrypt(data): key = bytes.fromhex("B936C14D95A99585073E5607784A51F7444B60D6BFD6110F76D004CCB7E1950E") skey = hashlib.sha256(key).digest() return AES.new(key=skey[:16], iv=skey[16:], mode=AES.MODE_CBC).decrypt(data) @staticmethod def descramble(data): key = bytes.fromhex("5C0E349A27DC46034C7B6744A378BD17") iv = bytes.fromhex("A0B0924686447109F2D51DCDDC93458A") ctr = Counter.new(128, initial_value=bytes_to_long(iv)) return AES.new(key=key, counter=ctr, mode=AES.MODE_CTR).decrypt(data) def sbrom_sha256(self, _buffer, destaddr): # TZCC_SHA256_Init dataptr = destaddr + 0x40 ivptr = destaddr + 0x20 outptr = destaddr self.writemem(0x1000108C, pack(">32 pdesc = hw_desc_init() pdesc = hw_desc_set_din_type(pdesc, DmaMode.DMA_DLLI, aesivptr, 0x20, SB_AXI_ID, AXI_SECURE) pdesc = hw_desc_set_flow_mode(pdesc, FlowMode.S_DIN_to_HASH) pdesc = hw_desc_set_cipher_mode(pdesc, SepHashHwMode.SEP_HASH_HW_SHA256) pdesc = hw_desc_set_setup_mode(pdesc, SetupOp.SETUP_LOAD_STATE0) self.sasi_sb_adddescsequence(pdesc) # 0=0 # 1=0x8000041 # 2=0 # 3=0 # 4=0x4000825 # 5=0 tdesc = hw_desc_init() tdesc = hw_desc_set_flow_mode(tdesc, FlowMode.S_DIN_to_HASH) tdesc = hw_desc_set_cipher_mode(tdesc, SepHashHwMode.SEP_HASH_HW_SHA256) tdesc = hw_desc_set_setup_mode(tdesc, SetupOp.SETUP_LOAD_KEY0) tdesc = hw_desc_set_din_const(tdesc, 0, 0x10) self.sasi_sb_adddescsequence(tdesc) if cryptodrivermode >= 1: mdesc = hw_desc_init() mdesc = hw_desc_set_cipher_mode(mdesc, SepCipherMode.SEP_CIPHER_CTR) mdesc = hw_desc_set_setup_mode(mdesc, SetupOp.SETUP_LOAD_STATE1) mdesc = hw_desc_set_flow_mode(mdesc, FlowMode.S_DIN_to_AES) mdesc = hw_desc_set_dout_dlli(mdesc, 0, AES_BLOCK_SIZE_IN_BYTES, SB_AXI_ID, 0) self.sasi_sb_adddescsequence(mdesc) mdesc2 = hw_desc_init() mdesc2 = hw_desc_set_cipher_mode(mdesc2, SepCipherMode.SEP_CIPHER_CTR) mdesc2 = hw_desc_set_setup_mode(mdesc2, SetupOp.SETUP_LOAD_KEY0) mdesc2 = hw_desc_set_flow_mode(mdesc2, FlowMode.S_DIN_to_AES) mdesc2 = hw_desc_set_dout_dlli(mdesc2, 0, AES_BLOCK_SIZE_IN_BYTES, SB_AXI_ID, 0) self.sasi_sb_adddescsequence(mdesc2) def sbrom_cryptoupdate(self, inputptr, outputptr, block_size, islastblock, cryptodrivermode, waitforcrypto): if waitforcrypto == 2: if self.sb_hal_wait_desc_completion() == 1: return True if islastblock == 1 and (cryptodrivermode & 0xFFFFFFFD) == 0: # 0=0 # 1=0 # 2=outputptr # 3=0x42 # 4=0x908082B # 5=outputptr>>32<<16 ydesc = hw_desc_init() ydesc = hw_desc_set_dout_dlli(ydesc, outputptr, 0x10, SB_AXI_ID, 0) ydesc = hw_desc_set_flow_mode(ydesc, FlowMode.S_HASH_to_DOUT) ydesc = hw_desc_set_cipher_mode(ydesc, SepHashHwMode.SEP_HASH_HW_SHA256) ydesc = hw_desc_set_cipher_config1(ydesc, SepHashMode.SEP_HASH_SHA256) ydesc = hw_desc_set_setup_mode(ydesc, SetupOp.SETUP_WRITE_STATE1) self.sasi_sb_adddescsequence(ydesc) udesc = hw_desc_init() udesc = hw_desc_set_din_type(udesc, DmaMode.DMA_DLLI, inputptr, block_size, SB_AXI_ID, AXI_SECURE) if not cryptodrivermode: udesc = hw_desc_set_flow_mode(udesc, FlowMode.DIN_HASH) self.sasi_sb_adddescsequence(udesc) if (waitforcrypto == 2 and not islastblock) or waitforcrypto == 3: self.sb_hal_wait_desc_completion() elif waitforcrypto == 0: return 0 else: return 0xF2000001 def sbrom_cryptofinishdriver(self, outputptr): fdesc = hw_desc_init() fdesc = hw_desc_set_dout_dlli(fdesc, outputptr, 0x20, SB_AXI_ID, 0) fdesc = hw_desc_set_flow_mode(fdesc, FlowMode.S_HASH_to_DOUT) fdesc = hw_desc_set_cipher_mode(fdesc, SepHashHwMode.SEP_HASH_HW_SHA256) fdesc = hw_desc_set_cipher_config0(fdesc, SepHashHwMode.SEP_HASH_HW_SHA256) fdesc = hw_desc_set_cipher_config1(fdesc, SepHashMode.SEP_HASH_SHA256) fdesc = hw_desc_set_setup_mode(fdesc, SetupOp.SETUP_WRITE_STATE0) # 0 = 0 # 1 = 0 # 2 = outputptr # 3 = 0x82 # 4 = 0x80C082B # 5 = outputptr>>32<<16 self.sasi_sb_adddescsequence(fdesc) return self.sb_hal_wait_desc_completion() if __name__ == "__main__": # 0=0 # 1=0 # 2=outputptr # 3=0x42 # 4=0x908082B # 5=outputptr>>32<<16 desc = hw_desc_init() desc = hw_desc_set_dout_dlli(desc, 0, 0x10, SB_AXI_ID, 0) desc = hw_desc_set_flow_mode(desc, FlowMode.S_HASH_to_DOUT) desc = hw_desc_set_cipher_mode(desc, SepHashHwMode.SEP_HASH_HW_SHA256) desc = hw_desc_set_cipher_config1(desc, SepHashMode.SEP_HASH_SHA256) desc = hw_desc_set_setup_mode(desc, SetupOp.SETUP_WRITE_STATE1) print(desc)